[CST-2] VLSI

John Wyllie jmw74@cam.ac.uk
Tue, 4 Jun 2002 22:14:13 +0100


The p-type transistors are there because they are a smaller way to make a
gap between each array in the matrix.

That's what I've got scribbled in my notes anyway - that diagram is well
complicated.

John

> -----Original Message-----
> From: cst-2-admin@srcf.ucam.org [mailto:cst-2-admin@srcf.ucam.org]On
> Behalf Of Anthony Jones
> Sent: 04 June 2002 22:06
> To: cst-2@srcf.ucam.org
> Subject: [CST-2] VLSI
>
>
> Page 16 of the VLSI notes, the CMOS gate matrix: At the top there's a
> p-type diffusion, with breaks in it where there are p-type
> transistors with
> their gates tied high:
>
> MMMMMMMMMMMMMMMMMMMM  <- Metal
>     M  P  M
> DDDDMDDPDDMDDDDDDDDD  <- Diffusion (p-type)
>        P
>        ^
>        |
>        \---------------- Polysilicon (causing break in diffusion)
>
> But then the diffusion is connected to the power line on both sides of the
> p-type transistors, meaning that the break caused by the p-type transistor
> is effectively pointless, and you could do away with it entirely...
>
> Or am I missing something?
>
> Ant
>
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