[CST-2] Specification Verification 2

[James Srinivasan]

> Does anyone know  which slides (or pages of slides), if any, were not
> lectured? I missed about two lectures, and am therefore not sure if the
> stuff on transistors was lectured or not. How much detail did he go into
> regarding the other TL logics?(ITL, CTL* etc)

The only stuff in the slides I recall that wasn't lectured was the stuff in
"Relating Trace Models" from slide 14 to 20 (in fact, right after it says
"skip to slide 21"). He didn't go into too much detail about the other
logics beyond what was on the slides, but they were definitely lectured.
However, there's quite a lot of things in the notes that wasn't lectured
(e.g. detail of simulation processes)

Hope this helps,

James