[CST-2] OptComp CST99/9/4: Instruction Scheduling

Matthew Lloyd mil22@cam.ac.uk
Sun, 20 May 2001 19:14:21 +0100


> I know that Alpha has load instructions (e.g. ld_u ...) that
automatically
> align the addresses, but not so sure about ( ld.w ), is that to do
with
> alignment ?? Can someone explain please !

In fact I don't think it matters particularly for this course - Dr.
Mycroft has probably used 'ld.w' to represent any generic load from
memory operation and could equally have used 'ld'. 

Suppose the registers are 32 bits wide. On some architectures the
instruction

ld.b r0,[address]

might load only the least significant 8 bits of r0 from the address
given, leaving the most significant 24 bits of r0 intact, whereas

ld.w r0,[address]

might load the full 32 bits. In other words the suffix indicates how
much data to load or store from the address. 'b' would stand for 'byte'
(8 bits) and 'w' for 'word' (32 bits). 

Just to be confusing, on some architectures, the 'w' might stand for a
'word' of 16 bits, and we might have some suffix 'dw' which stood for
'double word', or 32 bits.

Perhaps Dr. Mycroft has used 'w' with ld/st to indicate that the full
size of the register should be exchanged with memory. His aim might have
been to reduce confusion; it is not clear whether

ld r0,[address]
st r1,[address + 2 bytes]

can be permuted as we don't know whether the memory stored to overlaps
that read from. However it's more likely that he used 'ld.w' in place of
'ld' to make his examples look more like real assembly code!

HTH
Matthew